• The specifications for the next generation of FPDP (FPDP II) are now being developed by ICS in cooperation with other FPDP partners.
• The essential features of the FPDP II specifications are:
• Backward compatibility with the currrent FPDP standard.
• Double-edged clocking
• 400 MBytes/s sustained data transfer rate, using a 50 MHz clock rate
• ICS is currently developing hardware in order to test and characterize the performance of FPDP II.
• A detailed draft specification and all test results will be posted on this website in the near future for review by all FPDP members.
• If you wish to take part in the development of the FPDP II specifications, please contact info@ics-ltd.com

On 14 September 1999, a meeting of FPDP Partners was held at the head office of Interactive Circuits & Systems (ICS). At this meeting, ICS personnel presented their view of a design approach for FPDP II. To download this presentation click here: ICS FPDP II Preliminary Design Presentation.

At this meeting, ICS also gave a demonstration using a prototype FPDP II interface. Similar boards and/or details of the design can be made available to Partner companies wishing to experiment with the technology. Please use the feedback link below to request a board, or to give us your reaction to the presentation.

ICS welcomes your feedback on this information. Feedback will be made available on this web site. Feedback